Specifications for each DIMM Module
ValueRAM's 512M x 64-bit (4GB)DDR3-1333 CL9 SDRAM (Synchronous DRAM), 1Rx8 memorymodule, based on eight 512M x 8-bit DDR3-1333 FBGA compo-nents. The SPD is programmed to JEDEC standard latencyDDR3-1333 timing of 9-9-9 at 1.5V. This 240-pin DIMM usesgold contact fingers. The electrical and mechanical specifica-tions are as follows:FEATURES• JEDEC standard 1.5V (1.425V ~1.575V) Power Supply• VDDQ = 1.5V (1.425V ~ 1.575V)• 667MHz fCK for 1333Mb/sec/pin• 8 independent internal bank• Programmable CAS Latency: 9, 8, 7, 6• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock• Programmable CAS Write Latency(CWL) = 7 (DDR3-1333)• 8-bit pre-fetch• Burst Length: 8 (Interleave without any limit, sequential withstarting address “000” only), 4 with tCCD = 4 which does notallow seamless read or write [either on the fly using A12 orMRS]• Bi-directional Differential Data Strobe• Internal(self) calibration: Internal self calibration through ZQpin (RZQ : 240 ohm ± 1%)• On Die Termination using ODT pin• Average Refresh Period 7.8us at lower than TCASE 85°C,3.9us at 85°C < TCASE